Dan,

Thanks, Dan, I have noticed that the first patch for merging vcpu.c had been cheked in. This patch is based on ver.6866, and has gone through your stress-test.

Following things are done in this patch. 1. Add r4,r5,r6,r7,eml_unat,rfi_pfs six members at the end of pt_regs, thus VMM for non-VT domain doesn't need to save/restore SWITCH_STACK just in case VMM may need modify guest r4,r5,r6,r7 value, eml_unat is saved in case VMM may need modify guest unat, rfi_pfs is used to emulate guest rfi instruction for VT domain, and is used as dummy member for alignment of F6, F7 etc. in pt_regs for non-VT domain. And add code to save/restore r4,r5,r6, r7,eml_unat in minstate.h and entry.s for non-VT domain. and remove code to save/restore SWITCH_STACK in ivt.S for non-VT domain. 2. Originally guest banked registers of VT domain are saved directly in VPD. Now Guest banked registers of VT domain are saved to pt_regs at the entry of VMM, just for consistence with non-VT domain, vmx_vcpu_bsw0 and vmx_vcpu_bsw1 are rewriten for accomodating this change. 3. After above changes, all guest registers and nat bits are saved at same place both for VTI domain and for non-VTI domain, so vcpu_get/set_gr and rse_get/set_gr are merged, and all these functions can handle guest nats. 4. Merged vcpu_bsw0 and vcpu_bsw1, Now VMM uses vgr[16],vbgr[16],vnat,vbnat in mapped_regs_t struct (is also vpd) to emuate guest banking switch operation. 5. Removed some CONFIG_VTIs and cleaned up some unused structure members and codes.

Signed-off-by Anthony Xu <Anth...@intel.com>

Thanks, Anthony