|Palle Girgensohn||Sep 10, 2007 3:16 am|
|Palle Girgensohn||Sep 10, 2007 3:46 am|
|Claus Guttesen||Sep 10, 2007 3:51 am|
|Erich Dollansky||Sep 10, 2007 3:54 am|
|Erich Dollansky||Sep 10, 2007 3:58 am|
|Palle Girgensohn||Sep 10, 2007 7:57 am|
|Paul Pathiakis||Sep 10, 2007 7:57 am|
|Martin Cracauer||Sep 10, 2007 11:58 am|
|Freddie Cash||Sep 10, 2007 3:18 pm|
|Alfred Perlstein||Sep 10, 2007 4:09 pm|
|Kris Kennaway||Sep 10, 2007 4:32 pm|
|Paul Pathiakis||Sep 10, 2007 4:56 pm|
|Erich Dollansky||Sep 10, 2007 5:57 pm|
|Claus Guttesen||Sep 10, 2007 11:11 pm|
|Ivan Voras||Sep 11, 2007 1:39 am|
|Abdullah Ibn Hamad Al-Marri||Sep 11, 2007 2:17 am|
|Martin Cracauer||Sep 11, 2007 7:34 am|
|David O'Brien||Sep 12, 2007 4:44 pm|
|Alfred Perlstein||Sep 12, 2007 8:27 pm|
|Kris Kennaway||Sep 12, 2007 11:49 pm|
|Palle Girgensohn||Sep 13, 2007 6:43 am|
|Claus Guttesen||Sep 13, 2007 11:16 am|
|Francisco Reyes||Sep 13, 2007 12:25 pm|
|Palle Girgensohn||Sep 13, 2007 1:45 pm|
|Francisco Reyes||Sep 13, 2007 4:44 pm|
|Palle Girgensohn||Sep 13, 2007 11:44 pm|
|Claus Guttesen||Sep 14, 2007 12:33 am|
|Francisco Reyes||Sep 14, 2007 3:44 pm|
|Palle Girgensohn||Sep 17, 2007 5:58 am|
|Kevin Way||Sep 19, 2007 11:24 am|
|Decibel!||Sep 20, 2007 3:39 pm|
|Claus Guttesen||Sep 20, 2007 10:57 pm|
|Eric Anderson||Sep 21, 2007 5:07 am|
|Decibel!||Oct 6, 2007 9:02 am|
|Subject:||AMD or Intel?|
|From:||Martin Cracauer (crac...@cons.org)|
|Date:||Sep 11, 2007 7:34:31 am|
Paul Pathiakis wrote on Mon, Sep 10, 2007 at 07:11:27PM -0400:
On Monday 10 September 2007 14:46:21 Martin Cracauer wrote:
For integer workloads Intel's Core2-base Xeons outperforms K8 (the old-school AMD64) by about 25-30% per clock per core. K10 seems to be 5-15% faster than K8 for integer workloads (I hope to run my benchmark suite on one thi week or weekend).
However, tasks that use multiple cores and have threads on cores communicate a lot see both AMD architectures close the gap.
Paul Pathiakis wrote on Mon, Sep 10, 2007 at 10:17:40AM -0400:
Be very, very careful in purchasing Core 2 Duo. There are major problems with the chip that have been documented across the board.
These have been blown out of proportion by Theo. Can you point to a demonstratable case with current Linux or BSD kernels?
Agreed. However, Matt Dillon also made statements as did a few EE types.
The chip is complicated due to poor design and the need for backward compatibility. I believe several people over the years have said that if they dumped everything pre-Pentium (486 instructions and earlier), the instruction set and complexity could easily be halved.
Doubtful. All the legacy instructions that are not part of the "useful" set are just high-level microcode programs. You can tell by how slow they are :-)
The true complexity of Core2 is in the new caches, including speculative prefetch (aka they keep a dependency graph around and can invalidate wrongly fetched cache lines).
Most of the bugs that Theo was concerned about are in emmory management and MMU, which might or might not be made worse by the caches.
There probably is some additional memory management complexity from i386 compatibility, but I don't see how, for example, the need to run non-MMU code would cause MMU bugs. Also, I really like to continue to use my bootloaders :-)
Honestly, could you imagine how energy efficient and fast these chips (from both) would be at that point?
One of the things that I'm seeing that really is starting to show is the use of more layers of cache and their increases in size.
Not sure what you mean here. The L2 and L3 caches we see today have been around for long.