On 2010-06-05 at 21:15, Matthew Jacob wrote:
On 6/5/2010 7:50 PM, Ståle Kristoffersen wrote:
On 2010-06-05 at 19:28, Matthew Jacob wrote:
Okay, good, my best guess is that that SATA signals past the STP bridge
got jammed up and a PHY reset was issued by the firmware.
How can I debug that further?
Is it necessary to track further if all is okay after the first reset?
Oh, I might have misunderstood what you where asking about;
It works fine untill the next timeout occurrs. Could be a few hours, could
be 5 minutes.
free...@freebsd.org mailing list
To unsubscribe, send any mail to "free...@freebsd.org"