Re: [Xen-ia64-devel] [PATCH] implemented vcpu_ptc_l() - Isaku Yamahata - com.xensource.lists.xen-ia64-devel

11 messages in com.xensource.lists.xen-ia64-develRe: [Xen-ia64-devel] [PATCH] implemen...

From	Sent On	Attachments
Isaku Yamahata	05 Dec 2005 19:20
Magenheimer, Dan (HP Labs Fort Collins)	05 Dec 2005 20:36
Dong, Eddie	05 Dec 2005 21:30
Isaku Yamahata	05 Dec 2005 23:17
Isaku Yamahata	05 Dec 2005 23:34
Dong, Eddie	06 Dec 2005 05:38
Magenheimer, Dan (HP Labs Fort Collins)	06 Dec 2005 08:15
Isaku Yamahata	06 Dec 2005 19:45
Dong, Eddie	06 Dec 2005 20:35
Isaku Yamahata	06 Dec 2005 21:30
Dong, Eddie	06 Dec 2005 22:33

Subject:	Re: [Xen-ia64-devel] [PATCH] implemented vcpu_ptc_l()
From:	Isaku Yamahata (yama...@valinux.co.jp)
Date:	12/06/2005 07:45:01 PM
List:	com.xensource.lists.xen-ia64-devel

On Tue, Dec 06, 2005 at 08:16:13AM -0800, Magenheimer, Dan (HP Labs Fort
Collins) wrote:

However, one other possible problem: Around the call to ia64_local_tlb_purge, I think you need to check if rr0 needs to be swapped (see similar code in vcpu_itc_i()).

attached patch. vcpu_ptc_ga() seems to have same problem. I also fixed it.

Signed-off-by Isaku Yamahata <yama...@valinux.co.jp>

vcpu_ptc_l() and vcpu_ptc_ga() should be aware of metaphysical mode.

diff -r 13e0bf5113b9 -r ea3a4ab59710 xen/arch/ia64/xen/vcpu.c --- a/xen/arch/ia64/xen/vcpu.c Tue Dec 6 17:01:21 2005 +0900 +++ b/xen/arch/ia64/xen/vcpu.c Wed Dec 7 12:27:07 2005 +0900 @@ -1828,6 +1828,8 @@ IA64FAULT vcpu_ptc_l(VCPU *vcpu, UINT64 vadr, UINT64 addr_range) { extern void ia64_local_tlb_purge (unsigned long start, unsigned long end,
unsigned long nbits); + BOOLEAN swap_rr0 = (!(vadr >> VRN_SHIFT) && + PSCB(vcpu, metaphysical_mode));

//printk("##### vcpu_ptc_l(%p, %"PRIx64", %"PRIx64")\n", // vcpu, vadr, addr_range); @@ -1840,7 +1842,9 @@ #ifdef VHPT_GLOBAL vhpt_flush_address(vadr, addr_range); #endif + if (swap_rr0) set_one_rr(0x0, PSCB(vcpu, rrs[0])); ia64_local_tlb_purge(vadr, vadr + addr_range, PAGE_SHIFT); + if (swap_rr0) set_metaphysical_rr0(); vcpu_purge_tr_entry(&PSCBX(vcpu,dtlb)); vcpu_purge_tr_entry(&PSCBX(vcpu,itlb)); return IA64_NO_FAULT; @@ -1894,6 +1898,9 @@ IA64FAULT vcpu_ptc_ga(VCPU *vcpu,UINT64 vadr,UINT64 addr_range) { extern ia64_global_tlb_purge(UINT64 start, UINT64 end, UINT64 nbits); + BOOLEAN swap_rr0 = (!(vadr >> VRN_SHIFT) && + PSCB(vcpu, metaphysical_mode)); + // FIXME: validate not flushing Xen addresses // if (Xen address) return(IA64_ILLOP_FAULT); // FIXME: ??breaks if domain PAGE_SIZE < Xen PAGE_SIZE @@ -1901,7 +1908,9 @@ #ifdef VHPT_GLOBAL vhpt_flush_address(vadr,addr_range); #endif + if (swap_rr0) set_one_rr(0x0,PSCB(vcpu, rrs[0])); ia64_global_tlb_purge(vadr,vadr+addr_range,PAGE_SHIFT); + if (swap_rr0) set_metaphysical_rr0(); vcpu_purge_tr_entry(&PSCBX(vcpu,dtlb)); vcpu_purge_tr_entry(&PSCBX(vcpu,itlb)); return IA64_NO_FAULT;