| From | Sent On | Attachments |
|---|---|---|
| Tommy Hallgren | Nov 23, 1999 5:39 am | |
| Peter Wemm | Nov 23, 1999 6:01 am | |
| Poul-Henning Kamp | Nov 23, 1999 6:09 am | |
| Matthew Dillon | Nov 23, 1999 9:02 am | |
| Matthew Dillon | Nov 23, 1999 9:51 am | |
| Matthew Dillon | Nov 23, 1999 10:18 am | |
| Matthew Dillon | Nov 23, 1999 10:23 am | |
| Matthew Dillon | Nov 23, 1999 10:23 am | |
| Alan Cox | Nov 23, 1999 10:38 am | |
| Matthew Dillon | Nov 23, 1999 11:00 am | |
| Matthew Dillon | Nov 23, 1999 11:41 am | |
| Matthew Dillon | Nov 23, 1999 11:50 am | |
| Alfred Perlstein | Nov 23, 1999 12:01 pm | |
| Alan Cox | Nov 23, 1999 12:22 pm | |
| Alan Cox | Nov 23, 1999 12:52 pm | |
| Alfred Perlstein | Nov 23, 1999 1:09 pm |
| Subject: | Re: Matt's new unlock optimiazation | |
|---|---|---|
| From: | Alfred Perlstein (bri...@wintelcom.net) | |
| Date: | Nov 23, 1999 1:09:22 pm | |
| List: | org.freebsd.freebsd-smp | |
On Tue, 23 Nov 1999, Alan Cox wrote:
I would *strongly* recommend that everyone interested in low-level SMP issues read http://rsim.cs.uiuc.edu/~sadve/Publications/models_tutorial.ps. This is a tutorial on memory consistency models (with lots of examples) from IEEE Computer.
The Intel note that Matt referred to describes a lot of detail about the model implemented by the x86, but in the end says, for all practical purposes, you should treat the x86 as though it implements processor-ordering (or processor consistency). The tutorial explains precisely what this means to you as a programmer.
I've been reading the SPARC Arch manual for a long time, especially the sections on 'memory models'. I just had no idea that intel implemented these type of optimizations and thought that it always followed the strong memory model (TSO). oops? :)
Thank you for the reference I'll be sure to read it throughly before touching any of the asm or consider myself viable as a reviewer for such changes.
thanks, -Alfred
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