RE: [Xen-devel] NMI delivery not correctly working - Kaushik Barde - com.xensource.lists.xen-devel

8 messages in com.xensource.lists.xen-develRE: [Xen-devel] NMI delivery not corr...

From	Sent On	Attachments
Christoph Egger	24 Jul 2007 08:47
Keir Fraser	24 Jul 2007 10:07
Kaushik Barde	24 Jul 2007 11:25
Keir Fraser	24 Jul 2007 23:22
Kaushik Barde	24 Jul 2007 23:43
Christoph Egger	24 Jul 2007 23:47
Keir Fraser	24 Jul 2007 23:54
Keir Fraser	24 Jul 2007 23:56

Subject:	RE: [Xen-devel] NMI delivery not correctly working
From:	Kaushik Barde (Kaus...@Phoenix.com)
Date:	07/24/2007 11:43:18 PM
List:	com.xensource.lists.xen-devel

Thanks.

via masking of maskable interrupts << What I'd meant there was all other interrupts are masked (by processor during
NMI handling) except for NMI.

-Kaushik

________________________________

From: Keir Fraser [mailto:ke...@xensource.com] Sent: Tue 7/24/2007 11:22 PM To: Kaushik Barde; Christoph Egger; xen-...@lists.xensource.com Subject: Re: [Xen-devel] NMI delivery not correctly working

On 24/7/07 19:26, "Kaushik Barde" <Kaus...@Phoenix.com> wrote:

Processor disables calls to subsequent NMIs till it receives next IRET instruction

Yes.

(via masking of maskable interrupts).

No, since NMIs are, of course, not maskable by conventional means.

I guess, what I am not clear about is how a fully-virtualized guest whould issue a IRET hypercall?

It's used just like any other hypercall. Guest jumps at the correct offset into its hypercall transfer page.

-- Keir

-Kaushik

-----Original Message----- From: xen-...@lists.xensource.com [mailto:xen-...@lists.xensource.com] On Behalf Of Keir Fraser Sent: Tuesday, July 24, 2007 10:08 AM To: Christoph Egger; xen-...@lists.xensource.com Subject: Re: [Xen-devel] NMI delivery not correctly working

On 24/7/07 16:47, "Christoph Egger" <Chri...@amd.com> wrote:

I know, there is a line "current->nmi_masked = 0;" in do_iret() in xen/arch/x86/x86_(32|64)/traps.c, but this is actually never called after NMI delivery.

Guests *must* use the iret hypercall when returning from their NMI handler. This is giving a virtualised equivalent of the 'NMI-blocking' latch implemented in x86 processors, which is reset by the IRET instruction.

-- Keir